Among many information apparatuses, demands for high performance and low power consumption have recently become strong and therefore, development of a system that uses a multi-core processor is currently implemented to realize higher performance and lower power consumption.
Related conventional techniques include, for example, a technique concerning switching between tasks in a micro computer (see, e.g., Japanese Laid-Open Patent Publication Nos. 2004-272894 and H10-207717). A technique is also present concerning power control of plural processor cores (see, e.g., Japanese Patent No. 4413924)
However, in a conventional multi-core processor system, during a multi-task operation, applications that are frequently switched to, may be assigned to the same CPU. Therefore, a problem arises in that the time consumed for the switching of the application increases.